The inventive concepts described herein relate to a delay time control circuit, and more particularly, relate to a delay time control circuit capable of controlling a delay time using a plurality of current sources and a control method thereof.
A delay time control circuit may be used to control signals associated with a circuit operation where a semiconductor device or many circuits operates normally. In general, the delay time control circuit may use a manner in which a current amount of an inverter is varied or a manner in which an output load of an inverter is varied. A delay time between an input clock and an output clock of an inverter may be reversely proportional to a current amount applied to the inverter, and may be proportional to a size of an output load. This inverter manner may operate in a structure formed of PMOS and NMOS transistors.
In the delay time control circuit, however, a delay time of a critical path may be different according to a variation in an external voltage or a temperature due to a characteristic of a MOS transistor. For example, the delay time control circuit may be designed on the basis of a worst condition (e.g., a low-voltage and high-temperature state) of a storage element to obtain a fast access time. If the delay time control circuit thus designed operates at a best condition (e.g., a high-voltage and low-temperature state) under the condition that a delay time difference of a critical path is not compensated, a response speed of the delay time control circuit may become fast. Since an operating time between signals for controlling a circuit is not matched, an operation of a circuit may be delayed. Or, since a path delay difference is serious, an abnormal operation may arise.
On the other hand, if the delay time control circuit compensates a difference of a path delay time in view of a best condition of a storage element, an operation of a circuit may be delayed at a worst condition or it is difficult to realize a fast access time. In the delay time control circuit adopting the inverter manner it is difficult to precisely match operating times of circuits according to an external property.
Thus, development on a delay time control circuit may be made to precisely match precisely match operating times of circuits according to an external property.